The course aims to provide the basic concepts for logic design on reconfigurable systems (FPGAs) using the VHDL hardware description language. Through the course, it will be possible to see how the main base components in digital design are implemented through practical examples. After introducing the VHDL language, the course presents combinatorial and sequential circuits, showing their differences. The course then shows how to build a finite state machine to create more complex control flows. Finally, the course provides an example of a simple processor that shows the parts related to the data processing (datapath) and those related to the control tasks. The final course lesson introduces how to test the digital circuit and verify its functionality. The main topics of the course are:

• Introduction to the VHDL language
• Combinatorial circuits vs. sequential circuits
• LUT vs. BRAM
• Finite state machines (Mealy vs. Moore)
• Datapath and control (with examples of a small processor)
• Testing

 The course evaluation is on project delivery based on the topics seen during the course.

dal March 2023 a June 2023