Electronic Circuit Design

Research focus

The Peer review has evaluated this group as Good

The research activity in the field of IC design covers two main areas: the design of IC’s in submicron CMOS/BiCMOS technologies for RF applications and the second one aims to the implementation of digitally-controlled power management systems. Morever, recently the group has also started an activity on IC’s for biochip applications. Design of RF Integrated Circuits CMOS technology scaling enables tranceivers at higher frequencies, providing devices at fmax beyond 100 GHz, thus enabling the design of fully integrated RF circuits. However, the design of these systems is quite challenging from the analog standpoint. The reduction of power supply is not followed by a corresponding decrease of device noise, both flicker and white noise are higher at lower channel lengths. The signal to noise ratio decrease and the overall power dissipation needed for the analog stages to match the required specs increases. Moreover, as the operating frequency increase passive components (mainly inductors and varactors) have to be accurately integrated with a good quality factor. At the same time digitally-intensive solutions are gaining acceptance. Digital circuits are adopted to enhance the performance of RF, by calibration, or to digitally process the signal at IF, enabling the implementation of multistandard reconfigurable receivers. In this scenario, the group has focused a large part of its activity on the design of frequency synthesizer and on alternative architectures of transceiver, with particular emphasis on the digital- RF approach. The applications considered have changed during the most recent years, moving from GSM to 802.11 a/b/g WLAN and, more recently, to WiMAX and in general MIMO techniques. The circuits have been designed and tested in the labs of Politecnico on submicron technologies provided in frame of research collaboration with semiconductor companies and research labs (i.e. STMicroelectronics, Bell Laboratories of Lucent Technologies (then Agere) in Murray Hill, Ericsson Lab Italy and, more recently, with Intel Labs Hillsboro). The PLL is one of the fundamental blocks of a transceiver, since its performance, above all noise and dissipation, impact for a large part of the total power and sensitivity budget. New topologies of CMOS voltage controlled oscillators have been designed, which improve the phase noise performance and the quadrature accuracy. Also the frequency divider has been studied. In particular by developing a non-linear theory of the noise performance which has been experimentally validated, and by integrating for the first time a CMOS dynamic topology, which almost halves the power dissipation at 5 GHz. More recently the group has integrated and tested, in CMOS, a new fractional topology employing a spurs-reduction technique, and 2.5 GHz frequency synthesizer for direct frequency modulation, controlled by a digital frequency synthesizer, which shows the wider bandwidth among the ones presented in literature, about 2 MHz. The present activity aims to the design of so called all-digital PLL at 5 GHz and beyond, in collaboration with Intel labs, for WiMax applications. 324 In the research activity for “more digital” receivers, a new IF-sampling receiver architecture (US patent), which relaxes the image rejection issues, was integrated in collaboration with Lucent technologies. On the transmitter side, instead, a novel low-power signal separator circuit for LINC power amplifier has been integrated and tested. Design of mixed analog/digital circuits for power management The research is mainly focused on the development of digitally controlled DC-DC converters for distributed power systems (DPS). The steady reduction of supply voltages (down to the Volt range), along with the steep increase of load currents (from 80 A to 190 A for microprocessors) and the quest for higher efficiency, demand for high-performance modular power supply systems. Digital architectures outperform traditional analog ones in a market that requires increasingly complex and reconfigurable controllers, sophisticated power management strategies, low costs and short time-to-market. The research activities include: - design of novel fully digital and mixed-signal control architectures; - design of high-efficiency converter topologies; - design of integrated converters in mixed technology (Bipolar-CMOS-DMOS (BCDVI)). Design of circuits for biochips During the last decade, a considerable effort has been put by research groups worldwide to the development of neuroelectronic interfaces, able to allow bi-directional communication between neurons and electron devices. The main reference applications are: in-vitro recordings of cultured neural networks for drug discovery and the so-called brain-machine interfaces (BMI). Within the BMI context, the group has recently joined the Italian Institute of Technology (IIT), Genoa, Italy in order to contribute with its design espertise to the design of an implantable biochip able to read neural signals from the human brain to be used for prosthetic device control.

Dipartimento di afferenza

Dipartimento di Elettronica e Informazione (DEI)

Docenti afferenti

Andrea Lacaita (full professor)
Giancarlo Ripamonti (full professor)
Massimo Ghioni (full professor)
Angelo Geraci (associate professor)
Carlo Samori (associate professor)
Giorgio Padovini (associate professor)
Salvatore Levantino (assistant professor)